11 Myths About High-Speed SerDes Design for ADAS

Designing boards for automotive driver-assist systems with SerDes chipsets has prompted a number of myths and misconceptions. This article looks to debunk those fallacies.

By Ankur Verma & Cole Macias, Texas Instruments

Multiple sensors, such as high-resolution cameras, radar, LiDAR, etc., can be used for obstacle detection, ultimately helping car manufacturers reach Level 5 autonomous operation. Sometimes only cameras are used as the primary sensor for autonomous operation in order to save costs and simplify scale/implementation.

Powerful machine-learning algorithms like convolutional neural networks (CNNs) are leveraged to help recognize various objects such as cars, obstacles, lanes, traffic lights, etc., based on the sensor data.  These algorithms require as much information as possible about the scene, which drives the need for higher megapixel cameras. The “raw” image data captured by these miniature camera modules is transferred at very high speeds (10 Gb+/s) to a centralized electronic control unit (ECU) or image signal processor (ISP). Serializer/deserializer (SerDes) technology is at the heart of this high-speed transmission.

A lot of standardization is going on in terms of the interface to enable off-the-shelf camera solutions. FPD-Link III chipsets support camera use over serial links for advanced driver-assist systems (ADAS) in the automotive industry.1 In this article, we will walk you through the 11 myths that typically arise when designing the “camera-serializer/deserializer-ECU/ISP” link. These 11 myths will help you address system challenges often associated with ADAS serial links in order to get them to an optimal performance level.

Figure 1

Figure 1: Higher megapixel cameras in the car drive the need for higher data throughput over serial interface (FC = front camera, CMS = camera monitor system, DMS = driver monitor system, SVS = surround-view system).

Figure 1 shows different camera systems that use FPD-Link III serializer and deserializer chipsets. The “raw” information from the camera is serialized with the help of a serializer, transmitted over coaxial cable, and then deserialized at the receiver end (Fig. 2).

Figure 2

Figure 2: “Healthy” links have been designed between the sensor (camera/radar/LiDAR) and image signal processor (ISP) or ECU.

The raw data from the camera drives the need for higher data throughputs. A key advantage of higher-speed “raw data” instead of “camera data + processor” transmission is that it allows the image processing to happen outside the camera rather than on the centralized ECU processor side. That helps minimize camera size/heat/power dissipation (a critical factor as more and more cameras are incorporated into a car).

A cable carries the serialized high-speed raw-data signal, low-speed bidirectional control signal, and dc power for the miniature sensor module. Shielded coaxial cable is typically used because it’s cheaper (less copper!) and improves vehicle efficiency (lighter weight!). The cabling and the harnesses involved make up the third heaviest and costliest component in a car, right behind the chassis and engine1).

On the other end of the cable is the deserializer that “deserializes” the information, compensates for cable losses at such high speeds, equalizes the channel, and provides the camera data back to the processor.

Now that we understand why serial links are used, let’s dive into the myths experienced by board designers when using SerDes chipsets.

  1. My transmission channel goes through connectors, cables, maybe some intermediate boards, etc., and the TDR looks good. I should get the desired BER performance, but I don’t.
    Keep in mind any extra series or shunt components in the high-speed signal path do matter (Fig. 3). Successive impedance discontinuities increase rise time, leading to multiple reflections on the channel. The TDR trace may not communicate all of the information about the channel.The good news is that serial links can be modeled as two-port network. Take a look at the s-parameters for the transmission channel before deciding if the components matter or not. The s-parameters or the scattering parameters can describe any two-port network.S21 defines the insertion loss (describes how much energy is lost when the circuit is inserted), while S11 defines the return loss (describes how much energy is “returned” from the input). S21 = 1 indicates a lossless connection. S11 = 0 indicates a perfectly matched input port. A vector network analyzer (VNA) can plot the s-parameters in their various forms and show the return and insertion loss plots for the channel. Make sure they comply with your channel specification.

    Figure 3

    Figure 3 – The transmission Channel between the SerDes chipsets tends to be complex.

  1. Running high-speed signals through vias is bad all of the time! Why not use microstrip implementation and have traces running on the outer surfaces of a PCB?
    Microstrip implementation for traces can have high crosstalk and isn’t recommended for high-speed digital systems. Stripline traces inherently have zero crosstalk and minimize the EMI/EMC.2 Striplines require vias because traces must buried inside the printed circuit board (PCB). Vias do have some parasitic inductance in the path, but the good news is that the impedance of a properly designed via can be controlled to avoid any reflections on the line.Before we conclude that vias are good, let’s consider another scenario in Figure 4 that gives an example of a PCB via passing completely through the PCB. If the trace connections are made at one end of the via, it leaves a ”stub” on the other side. This stub would look like a capacitor on the TDR plot and can create resonance phenomena. At the quarter-wave frequency, the open-ended stub looks like a short and produces nulls of transmission. Thus, you must “back drill” such vias after the PCB is fabricated. The dangling via stub can be trimmed by drilling from the back side.

    Figure 4

    Figure 4 – This shows the stub that needs to be back-drilled.

  1. The multiple camera links in the car aren’t crosstalk(ing) significantly to each other.
    Actually, they do. Transmission lines coupled through a medium have crosstalk associated with them. There are two types of crosstalk: forward crosstalk and backward crosstalk. Forward crosstalk travels in the same direction as the aggressor. It grows with length and increasing aggressor dV/dt, whereas the backward crosstalk travels in the opposite direction as the aggressor and depends only on the aggressor amplitude. Make sure to measure the crosstalk between channels vs. frequency. IEEE802.3ap (v3.3) specifies insertion loss crosstalk ratio (ICR) that sums the crosstalk and plot using S21, covered in Myth #1.
  1. Not passing EMI CISPR Level 5? Consider the traces.
    Crosstalk must be limited to have sufficient signal-to-noise ratio (SNR) and achieve desired bit error rate. Crosstalk = death of the high-speed communication.3 The easiest first step for limiting crosstalk is to do stripline implementation for the traces. For the striplines, the propagation velocity of the wave is constant throughout the medium; hence, the forward crosstalk is zero. Thus, backward crosstalk is the predominant factor, which isn’t very significant anyway. Ref. 2 offers more information on other things you can do for EMI/EMC compliance.
  1. PCB stack-up—does it even matter?
    Yes it does! PCB stack-up must be symmetric around the center layer, otherwise during board fabrication, board warping may occur. Pay attention to the insertion loss of the PCB material when working at high speeds. Commonly used FR-4 material may only be used until a certain frequency. In addition, PCB stack-up has to comprise alternate layers—typically,  core and prepreg surrounds the signal/power/ground layer. Signal layers surrounded by ground planes help the noise coupling.
  1. I need frame-buffering and frame-length control on the processor side to stitch frames together.
    Each camera usually runs at its own different frequency. As a result, image frames received from the cameras have to be stitched together to create sense of the scene.  If the frames aren’t received at the same time, it could lead to errors while running image-processing algorithms.FPD-Link III devices offer synchronous mode of operation, whereby the clocks for the camera modules are derived from the clocks on the deserializer side. The deserializer also generates an internal frame-sync signal that enables seamless stitching and sensor fusion. The latency of the internal frame-sync pulse can be as low as 500 ns with FPD-Link III devices.
  1. Decoupling capacitance is enough. Have you considered the dc biasing effect yet?
    The decoupling or bypass capacitance must provide the high-frequency components of the current. The camera current fluctuates between active and blanking periods. Hence, bypass capacitors must take care of the ripple due to non-uniform current within a clock cycle, handle load transients, and filter any noise that could corrupt the high-speed signal. Parallel capacitors are used to give wideband low impedance. Ref. 3 offers more information on this issue.
  1. Making ac-coupling caps on the high-speed data line bigger won’t hurt, correct?
    Choosing ac-coupling capacitors depends on the bidirectional control speed. For example, at 25-MHz speed, FPD-Link III devices work optimally with 33 nF of capacitance that offers enough SNR to give desired bit-error-rate performance (depends on receiver design architecture). Bigger capacitance doesn’t hurt the data path because the devices would bring even lower impedance to the signal. But they increase the risk of unwanted coupling from system-level tests such as bulk current injection (BCI) and Power over Coax (PoC) circuitry into the high-speed data line.
  1. The serializer and deserializer are locked. Am I done?
    No…make sure to check the “quality” of the lock. Look at the eye diagram on the deserializer side when data is received. FPD-Link III devices offer several diagnostic features such as CRC error checking, voltage and temperature sensing, built-in self-tests, alarm bits, parity error checking, etc. You can even bring some of the monitoring pins to test points and connect them to your processor. The pattern-generation features can help check health of the links without using even a sensor in the system.
  1. When signal routing, does everything on the board need to be impedance-controlled?
    Figure 5 shows PCB recommendations for routing the power-feed network when used with the high-speed traces. The traces used for the power routing don’t have to be impedance-controlled; in fact, wide traces would help reduce their impedance and lower the power dissipation. Wider traces are preferable because they have lower inductance.One more tip is to use ac-coupling capacitors that are small as possible in the high-speed signal path (even 0201) to reduce their parasitic effect on the line.

    Figure 5

    Figure 5: Here’s the recommended PCB layout for a remote camera module.


    1. Power Over Coax components—just choose an inductor and you’re done.
      Miniature camera modules fitted in the car are remotely powered over the coaxial cable. Inductors in the real world have parasitic capacitance that limits their use to certain frequencies. Use multiple inductors in parallel to cover the low-, mid-, and high-bands of the frequency range (Fig. 6). Important factors to consider are inductor tolerance, RMS and saturation current ratings, and frequency range of operation. For more information, refer to Ref. 4. Adding parallel resistance helps reduce Q-factor, making the peaks more flat (Fig. 7).

      Figure 6

      Figure 6 – This impedance plot of shows that adding inductors forms a “wide-bandwidth” inductor.


      Figure 7

      Figure 7: The plot illustrates wide-bandwidth inductor impedance.


Texas Instruments offers high-performance, FPD-Link III SerDes chipsets that are designed to support megapixel camera modules with high immunity to interference.5

Ankur Verma is the applications lead for FPD-Link III products at Texas Instruments in Santa Clara, Calif. Ankur holds a Master’s in Electrical Engineering from Stanford University and has BSEE with highest distinction in Electronics Engineering from the University of Delhi (India).  Ankur has authored over 30 articles and application reports, and received multiple awards, including one from Worldwide Head of Analog at Texas Instruments. He is an active member in leading electronics forums; served as session chair for Electric Vehicle Track, 2015 IEEE 81st Vehicular Technology Conference, Glasgow (Scotland); and was a reviewer for many others.


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